The Sma-RTy Edge business unit will present a new conference paper at the IEEE MeditCom 2021, held in Athens from September 7th to 10th 2021, this year in a Hybrid In-Person and Virtual Conference format.
This work has been done in collaboration with Scuola Superiore Sant’Anna and CNIT, Pisa.
Here the abstact:
The 5G revolution will shape the telecommunication ecosystem providing high bandwidth and low latency. Moreover, the advent of NFV will require higher network flexibility to move functions to the edge. Many NFV are dedicated to data processing at the edge, thus they can be defined as PFV that may be accelerated exploiting programmable hardware. This paper proposes a FPGA pipeline for multi-service chain, enabling dynamic deployment and hardware resources management. Results show the effectiveness of the approach since the pipeline latency remains constant with different input aggregated throughput.
Hardware acceleration for Processing Function Virtualization
Federico Civerchia (Sma-RTy Italia SRL, Italy); Andrea Sgambelluri (Scuola Superiore Sant’Anna Pisa, Italy); Francesco Paolucci (CNIT, Italy); Luca Maggiani (Sma-RTy Italia SRL, Italy); Piero Castoldi (Scuola Superiore Sant’Anna, Italy); Filippo Cugini (CNIT, Italy)
Below the link to the Conference program: